The upcoming Tegra mobile chip from NVIDIA not contain 4 cores, but 5 cores, and NVIDIA has optimized its new chip to excel at high-performance and low power, two goals that are often contradictory. In a paper entitled “Variable SMP –A Multi-Core CPU Architecture for Low Power and High Performance Power and High Performance”, NVIDIA reveals how it has designed a quad-core chip, with a 5th “companion core” to achieve this seemingly impossible goal.
This graph provided by NVIDIA explain the power vs. performance conundrumThe root of the problem can be found in the process used to built computer chips. It is a fact that every chip leaks some amount of power, this is a natural phenomenon. In the context of this article, power leakage is the electric current that is consumed when the chip is in idle state. Although undesirable, especially on mobile devices, it cannot be avoided and the semiconductor industry has developed techniques to reduce power leakage.
But chips optimized for low-power leakage in idle state tend to consume more power than non-optimized chips during intense workloads. It’s obvious that people want a mobile device that consumes a minimal amount of power at all times.
Introducing the 5th “companion” coreThe semiconductor reality is not going anywhere, so NVIDIA took a rather interesting approach to the problem: Tegra 3 is using a 5th, companion core, to handle all the “low-power” tasks like running the operating system in sleep mode, checking emails and notification, and keeping the system alive when you are reading a book, playing media files. When that companion core is working the “normal” high-performance cores can be shut down.
Because this companion core is optimized for low-power, NVIDIA doesn’t want it to handle heavy workloads, or it would start consuming too much. To do so, its frequency has been set with a range of 0 to 0.5GHz. Whenever the companion core is overwhelmed by work, one or several high-performance cores wake up and pick up the work. This is NVIDIA’s definition and implementation of Variable Symmetric Multiprocessing (vSMP), which it has patented.
Automatic Core SwitchingThis graph shows the different combinations of ON/OFF coresIn its paper, NVIDIA says that the operating system (Android 3.0, aka Honeycomb) assumes that all CPU cores in the chip are identical instances, which is not true in this case. Therefore special management had to be devised at the hardware level, and the software level to make this heterogeneous group of cores completely transparent to the OS.
Cores are switched ON and OFF depending on a real-time analysis of the workload as the diagram above shows. The only “limitation” seems to be that “companion Core” cannot be activated when Core 1-4 are. NVIDIA says that not allowing the companion core and the high-performance cores to run at the same time simplifies the cache memory management and avoid performance penalties that would have hindered the high-performance cores.
Making this transparent to the OS is very important for many reasons, but for end-users, it means that OS updates don’t have to wait for NVIDIA to tweak some code.
[this is a developing story that will be updated as we go. Refresh this page later]
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